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 19-1986; Rev 1; 3/02
KIT EVALUATION LABLE AVAI
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package
General Description
The MAX1843 constant-off-time, pulse-width modulated (PWM) step-down DC-DC converter is ideal for use in 5V and 3.3V to low-voltage conversion necessary in notebook and subnotebook computers. This device features an internal PMOS power switch and internal synchronous rectification for high efficiency and reduced component count. An external Schottky diode is not required. The internal 90m power switch and 70m NMOS synchronous-rectifier switch easily deliver continuous load currents up to 2.7A. The MAX1843 produces a preset +2.5V, +1.8V, or +1.5V output voltage or an adjustable output from +1.1V to VIN. It achieves efficiencies as high as 95%. The MAX1843 uses a unique current-mode, constant-offtime, PWM control scheme, which includes Idle ModeTM to maintain high efficiency during light-load operation. The programmable constant-off-time architecture sets switching frequencies up to 1MHz, allowing the user to optimize performance trade-offs between efficiency, output switching noise, component size, and cost. The MAX1843 features an adjustable soft-start to limit surge currents during startup, a 100% duty-cycle mode for low dropout operation, and a low-power shutdown mode that disconnects the input from the output and reduces supply current below 1A. The MAX1843 is available in a 28pin QFN package with an exposed backside pad. o 1% Output Accuracy o Up to 1MHz Switching Frequency o 95% Efficiency o Internal PMOS/NMOS Switches 90m/70m On-Resistance at VIN = +4.5V 110m/80m On-Resistance at VIN = +3V o Output Voltage +2.5V, +1.8V, or +1.5V Pin Selectable +1.1V to VIN Adjustable o +3V to +5.5V Input Voltage Range o 350A Operating Supply Current o <1A Shutdown Supply Current o Programmable Constant-Off-Time Operation o Idle Mode Operation at Light Loads o Thermal Shutdown o Adjustable Soft-Start Inrush Current Limiting o 100% Duty Cycle During Low-Dropout Operation o Output Short-Circuit Protection o 28-Pin QFN Package
Features
MAX1843
Applications
5V or 3.3V to Low-Voltage Conversion CPU I/O Ring Chipset Supplies Notebook and Subnotebook Computers
PART MAX1843EGI
Ordering Information
TEMP RANGE -40C to +85C PIN-PACKAGE 28 QFN
Pin Configuration
N.C. N.C. N.C. 28 27 26 25 24 23 22 21 PGND 20 PGND 19 LX N.C. 18 LX 17 PGND 16 VCC 15 FBSEL 8 TOFF 9 FB 10 N.C. 11 N.C. 12 N.C. 13 GND 14 REF LX LX
TOP VIEW
INPUT +3V TO +5.5V
IN 10 VCC
LX MAX1843 FB PGND GND
OUTPUT +1.1V TO VIN
N.C. 1 IN 2 LX 3 IN 4 N.C. 5
2.2F
470pF SHDN COMP TOFF
SHDN
Typical Configuration
FBSEL REF SS 0.01F
COMP 7
MAX1843
1F
SS 6
Idle Mode is a trademark of Maxim Integrated Products.
QFN
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package MAX1843
ABSOLUTE MAXIMUM RATINGS
VCC, IN to GND ........................................................-0.3V to +6V Continuous Power Dissipation (TA = +70C) IN to VCC .............................................................................0.3V 28-Pin QFN (derate 20mW/C above +70C, part mounted GND to PGND.....................................................................0.3V on 1in2 of 1oz copper)......................................................1.6W Operating Temperature Range ...........................-40C to +85C All Other Pins to GND.................................-0.3V to (VCC + 0.3V) LX Current (Note 1).............................................................4.7A Storage Temperature Range .............................-65C to +150C REF Short Circuit to GND Duration ............................Continuous Junction Temperature ......................................................+150C ESD Protection .....................................................................2kV Lead Temperature (soldering, 10s) ................................ +300C Note 1: LX has internal clamp diodes to PGND and IN. Applications that forward bias these diodes should take care not to exceed the IC's package power dissipation limits.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = VCC = +3.3V, FBSEL = GND, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Input Voltage SYMBOL VIN, VCC TA = +25C to +85C FBSEL = VCC VIN = +3V to +5.5V FBSEL = unconnected Preset Output Voltage VOUT ILOAD = 0 to 2.5A FBSEL = REF TA = 0C to +85C VFB = VOUT FBSEL = GND TA = 0C to +85C Adjustable Output Voltage Range AC Load Regulation Error DC Load Regulation Error Dropout Voltage Reference Voltage Reference Load Regulation PMOS Switch On-Resistance NMOS Switch On-Resistance Current-Limit Threshold RMS LX Output Current VDO VREF VREF RON,P RON,N ILIMIT VIN = VCC = +3V, ILOAD = 1A TA = +25C to +85C TA = 0C to +85C IREF = -1A to +10A ILX = 0.5A ILX = 0.5A VIN = +4.5V VIN = +3V VIN = +4.5V VIN = +3V 3.1 1.089 1.084 1.100 1.100 0.5 90 110 70 80 3.6 VIN = VCC = +3V to +5.5V, FBSEL = GND 1.084 VREF 2 0.4 250 1.111 1.117 2 200 250 150 200 4.1 3.1 1.100 1.117 VIN V % % mV V mV m m A A TA = +25C to +85C 1.791 1.089 1.818 1.100 1.845 1.111 TA = 0C to +85C TA = +25C to +85C TA = 0C to +85C TA = +25C to +85C CONDITIONS MIN 3.0 2.500 2.487 1.500 1.492 1.800 2.525 2.525 1.515 1.515 1.818 TYP MAX 5.5 2.550 2.563 1.530 1.538 V 1.836 UNITS V
2
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2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VCC = +3.3V, FBSEL = GND, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Idle-Mode Current Threshold Switching Frequency No-Load Supply Current Shutdown Supply Current Thermal Shutdown Threshold Undervoltage Lockout FB Input Bias Current Off-Time Off-Time Startup Period On-Time SS Source Current SS Sink Current SHDN Input Current SHDN Logic Input Low Voltage SHDN Logic Input High Voltage FBSEL Input Current tON ISS ISS ISHDN VIL VIH IFB 2.0 VFBSEL = 0 to VCC FBSEL = GND FBSEL = REF FBSEL Logic Thresholds FBSEL = unconnected FBSEL = VCC Maximum Output RMS Current 0.9 0.7VCC - 0.2 VCC - 0.2 3.1 ARMS -4 4 0.2 1.3 0.7VCC + 0.2 V VSS = 1V VSHDN = 0 to VCC tOFF f IIN + ICC IIN + ICC TSHDN VUVLO (Note 2) VFB = 1.2V SHDN = GND, includes PMOS leakage Hysteresis = 15C VIN falling, hysteresis = 90mV VFB = 1.2V RTOFF = 110k RTOFF = 30.1k RTOFF = 499k FB = GND (Note 2) 0.4 4 100 -1 1 0.8 5 6 2.5 0 0.9 0.24 3.8 350 <1 160 2.6 60 1.00 0.30 4.5 4 tOFF 2.7 250 1.1 0.37 5.2 s s A A A V V A s SYMBOL CONDITIONS MIN 0.3 TYP 0.6 MAX 0.9 1 600 15 UNITS A MHz A A C V nA
MAX1843
ELECTRICAL CHARACTERISTICS
(VIN = VCC = +3.3V, FBSEL = GND, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 3)
PARAMETER Input Voltage
SYMBOL VIN, VCC
CONDITIONS FBSEL = VCC
MIN 3.0 2.475 1.485 1.782 1.078 VREF 1.078
MAX 5.5 2.756 1.545 1.854 1.122 VIN 1.122 200 250
UNITS V
Preset Output Voltage
VOUT
VIN = +3V to +5.5V, ILOAD = 0 to 2.5A, VFB = VOUT
FBSEL = unconnected FBSEL = REF FBSEL = GND
V
Adjustable Output Voltage Range Reference Voltage PMOS Switch On-Resistance VREF RON,P
VIN = VCC = +3V to +5.5V, FBSEL = GND
V V m
ILX = 0.5A
VIN = +4.5V VIN = +3V
_______________________________________________________________________________________
3
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package MAX1843
ELECTRICAL CHARACTERISTICS (continued)
(VIN = VCC = +3.3V, FBSEL = GND, TA = -40C to +85C, unless otherwise noted. Typical values are at TA = +25C.) (Note 3)
PARAMETER NMOS Switch On-Resistance Current-Limit Threshold Idle-Mode Current Threshold No-Load Supply Current FB Input Bias Current Off-Time
SYMBOL RON,N ILIMIT IIN + ICC IFB tOFF VFB = 1.2V VFB = 1.2V ILX = 0.5A
CONDITIONS VIN = +4.5V VIN = +3V
MIN
MAX 150 200
UNITS m A A A nA s
2.9 0.2 0 0.85
4.3 1.0 600 300 1.15
RTOFF = 110k
Note 2: Recommended operating frequency, not production tested. Note 3: Specifications from 0C to -40C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 1, TA = +25C, unless otherwise noted.)
EFFICIENCY vs. OUTPUT CURRENT (VIN = +5.0V, L = 2.5H)
MAX1843 toc03
EFFICIENCY vs. OUTPUT CURRENT (VIN = +3.3V, L = 1.5H)
95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 10 50 0.001 VOUT = +1.8V, RTOFF = 43k, fPWM = 1050kHz VOUT = +2.5V, RTOFF = 56k, fPWM = 1000kHz 0.01 0.1 1 10 VOUT = +2.5V, RTOFF = 39k, fPWM = 610kHz
MAX1843 toc04
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 0.001 VOUT = +1.8V, RTOFF = 75k, fPWM = 910kHz VOUT = +1.5V, RTOFF = 1OOk, fPWM = 770kHz 0.01 0.1 1 VOUT = +2.5V, RTOFF = 47k, fPWM = 1070kHz
100
OUTPUT CURRENT (A)
OUTPUT CURRENT (A)
EFFICIENCY vs. OUTPUT CURRENT (fPWM = 270kHz)
95 90 EFFICIENCY (%) 85 80 75 70 65 60 55 50 0.001 0.01 0.1 IOUT (A) 1 10 -0.4 0.001 VIN = +3.3V, VOUT = +1.8V, L = 4.7H, RTOFF = 160k VIN = +5V, VOUT = +1.8V, L = 5.6H, RTOFF = 240k
MAX1843 toc05
NORMALIZED OUTPUT ERROR vs. OUTPUT CURRENT
VIN = +3.3V, VOUT = +1.5V, L = 1.5H NORMALIZED OUTPUT ERROR (%) 0
MAX1843 toc06
100
0.1
-0.1
-0.2 VIN = +5V, VOUT = +1.5V, L = 2.5H -0.3
0.01
0.1
1
10
OUTPUT CURRENT (A)
4
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2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package MAX1843
Typical Operating Characteristics (continued)
(Circuit of Figure 1, TA = +25C, unless otherwise noted.)
SUPPLY CURRENT vs. SUPPLY VOLTAGE
500 NO-LOAD SUPPLY CURRENT, IIN + ICC (A) 450 400 350 300 250 200 150 100 50 0 0 1 2 3 VIN (V) 4 5 6 SHUTDOWN NO LOAD
MAX1843 toc01
OFF-TIME vs. RTOFF
SHUTDOWN SUPPLY CURRENT, IIN + ICC (nA) 90 80 70 60 50 40 30 20 10 0 4.5 4.0 3.5 tOFF (s) 3.0 2.5 2.0 1.5 1.0 0.5 0 0 50 100 150 200 250 300 350 400 450 500 RTOFF (k)
MAX1843 toc02
100
5.0
SWITCHING FREQUENCY vs. OUTPUT CURRENT
VIN = +5V, VOUT = +2.5V, L = 2.5H 1000 FREQUENCY (kHz) 800 600 400 VIN = +5V, VOUT = +1.5V, L = 2.5H 200 0 0 0.5 1.0 1.5 2.0 2.5 3.0 OUTPUT CURRENT (A)
MAX1843 toc07
STARTUP AND SHUTDOWN
MAX1843 toc08
1200
0
IINPUT 1A/div
VIN = +3.3V, VOUT = +1.5V, L = 1.5H
0
VSHDN 5V/div VOUTPUT 1V/div VSS 2V/div
0
0 1ms/div ROUT = 0.5, RTOFF = 56k VIN = +3.3V, VOUT = +1.5V
LOAD-TRANSIENT RESPONSE
MAX1843 toc09
LINE-TRANSIENT RESPONSE
MAX1843 toc10
VINPUT 2V/div VOUTPUT 50mV/div
0
IL 2A/div
VOUTPUT 20mV/div AC-COUPLED
10s/div
20s/div IOUT = 2.5A, VOUT = +1.5V RTOFF = 100k, L = 2.2H
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5
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package MAX1843
Pin Description
PIN 1, 5, 10, 11, 12, 22, 24, 26, 28 2, 4 3, 18, 19, 23, 25 6 7 8 9 13, backside pad 14 15 16 17, 20, 21 27 NAME FUNCTION
N.C.
Not internally connected.
IN LX SS COMP TOFF FB GND REF FBSEL VCC PGND SHDN
Supply Voltage Input--for the internal PMOS power switch Connection for the drains of the PMOS power switch and NMOS synchronous-rectifier switch. Connect the inductor from this node to the output filter capacitor and load. Soft-Start. Connect a capacitor from SS to GND to limit inrush current during startup. Integrator Compensation. Connect a capacitor from COMP to VCC for integrator compensation. See Integrator Amplifier section. Off-Time Select Input. Sets the PMOS power switch off-time during constant-off-time operation. Connect a resistor from TOFF to GND to adjust the PMOS switch off-time. Feedback Input--for both preset-output and adjustable-output operating modes. Connect directly to output for fixed-voltage operation or to a resistive divider for adjustable operating modes. Analog Ground. Connect exposed backside pad to pin 13. Reference Output. Bypass REF to GND with a 1F capacitor. Feedback Select Input. Selects output voltage. See Table 2 for programming instructions. Analog Supply Voltage Input. Supplies internal analog circuitry. Bypass VCC with a 10 and 2.2F lowpass filter. See Figure 1. Power Ground. Internally connected to the internal NMOS synchronous-rectifier switch. Shutdown Control Input. Drive SHDN low to disable the reference, control circuitry, and internal MOSFETs. Drive high or connect to VCC for normal operation.
Detailed Description
The MAX1843 synchronous, current-mode, constant-offtime, PWM DC-DC converter steps down input voltages of +3V to +5.5V to a preset output voltage of +2.5V, +1.8V, or +1.5V, or to an adjustable output voltage from +1.1V to VIN. It delivers up to 2.7A of output current. Internal switches composed of a 0.09 PMOS power switch and a 0.07 NMOS synchronous-rectifier switch improve efficiency, reduce component count, and eliminate the need for an external Schottky diode. The MAX1843 optimizes efficiency by operating in constant-off-time mode under heavy loads and in Maxim's proprietary idle mode under light loads. A single resistorprogrammable constant-off-time control sets switching frequencies up to 1MHz, allowing the user to optimize performance trade-offs in efficiency, switching noise, component size, and cost. Under low-dropout conditions, the device operates in a 100% duty-cycle mode, where the PMOS switch remains continuously on. Idle mode enhances light-load efficiency by skipping cycles, thus reducing transition and gate-charge losses.
6
When power is drawn from a regulated supply, constantoff-time PWM architecture essentially provides constantfrequency operation. This architecture has the inherent advantage of quick response to line and load transients. The MAX1843's current-mode, constant-off-time PWM architecture regulates the output voltage by changing the PMOS switch on-time relative to the constant offtime. Increasing the on-time increases the peak inductor current and the amount of energy transferred to the load per pulse.
Modes of Operation
The current through the PMOS switch determines the mode of operation: constant-off-time mode (for load currents greater than half the idle mode threshold, of idle mode), or idle mode (for load currents less than half the idle-mode threshold). Current sense is achieved through a proprietary architecture that eliminates current-sensing I2R losses.
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2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package MAX1843
INPUT 10 CIN 33F IN LX MAX1843 FB VCC 2.2F 470pF SHDN COMP PGND GND FBSEL REF 1F TOFF SS RTOFF 0.01F VOUT = +2.5V, FBSEL = VOUT = +1.8V, FBSEL = VOUT = +1.5V, FBSEL = VCC REF FLOATING L OUTPUT COUT 150F
Figure 1. Typical Circuit
0.01F FBSEL SS FB FEEDBACK SELECTION COMP 470pF 10 VCC REF gm REF VIN +3.0V TO +5.5V CIN CERAMIC
MAX1843
CURRENT SENSE SKIP PWM LOGIC AND DRIVERS SUMMING COMPARATOR
IN
VIN
2.2F SHDN REF 1F GND
LX COUT
VOUT
REF
TIMER
CURRENT SENSE PGND
TOFF RTOFF
NOTE: HEAVY LINES DENOTE HIGH-CURRENT PATHS.
Figure 2. Functional Diagram
Constant-Off-Time Mode Constant-off-time operation occurs when the current through the PMOS switch is greater than the idle-mode threshold current (which corresponds to a load current of half the idle mode threshold). In this mode, the regulation comparator turns the PMOS switch on at the end of each off-time, keeping the device in continuous-conduction
mode. The PMOS switch remains on until the output is in regulation or the current limit is reached. When the PMOS switch turns off, it remains off for the programmed off-time (tOFF). To control the current under short-circuit conditions, the PMOS switch remains off for approximately 4 x tOFF when VOUT < VOUT(NOM) / 4.
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7
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package
Idle Mode Under light loads, this device improves efficiency by switching to a pulse-skipping idle mode. Idle-mode operation occurs when the current through the PMOS switch is less than the idle-mode threshold current. Idle mode forces the PMOS to remain on until the current through the switch reaches the idle mode threshold, thus minimizing the unnecessary switching that degrades efficiency under light loads. In idle mode, the device operates in discontinuous conduction. Currentsense circuitry monitors the current through the NMOS synchronous switch, turning it off before the current reverses. This prevents current from being pulled from the output filter through the inductor and NMOS switch to ground. As the device switches between operating modes, no major shift in circuit behavior occurs.
MAX1843
The NMOS synchronous-rectifier switch turns on following a short delay after the PMOS power switch turns off, thus preventing cross-conduction or "shoot through." In constant-off-time mode, the synchronous-rectifier switch turns off just prior to the PMOS power switch turning on. While both switches are off, inductor current flows through the internal body diode of the NMOS switch. The internal body diode's forward voltage is relatively high. Junction-to-ambient thermal resistance, JA, is highly dependent on the amount of copper area immediately surrounding the IC leads. The MAX1843 EV kit has 1in2 of copper area and a thermal resistance of 50C/W with no forced airflow. Airflow over the board significantly reduces the junction-to-ambient thermal resistance. For heatsinking purposes, it is essential to connect the exposed backside pad to a large analog ground plane.
Thermal Resistance
100% Duty-Cycle Operation
When the input voltage drops near the output voltage, the duty cycle increases until the PMOS MOSFET is on continuously. The dropout voltage in 100% duty cycle is the output current multiplied by the on-resistance of the internal PMOS switch and parasitic resistance in the inductor. The PMOS switch remains on continuously as long as the current limit is not reached.
Power Dissipation
Power dissipation in the MAX1843 is dominated by conduction losses in the two internal power switches. Power dissipation due to supply current in the control section and average current used to charge and discharge the gate capacitance of the internal switches (i.e., switching losses) is approximately: PDS = C x VIN2 x fPWM where C = 2.5nF and fPWM is the switching frequency in PWM mode. This number is reduced when the switching frequency decreases as the part enters idle mode. Combined conduction losses in the two power switches are approximated by: PD = IOUT2 x RPMOS where RPMOS is the on-resistance of the PMOS switch. The junction-to-ambient thermal resistance required to dissipate this amount of power is calculated by: JA = (TJ,MAX - TA,MAX) / PD(TOT) where: JA = junction-to-ambient thermal resistance TJ(MAX) = maximum junction temperature TA(MAX) = maximum ambient temperature PD(TOT) = total losses
Shutdown
Drive SHDN to a logic-level low to place the MAX1843 in low-power shutdown mode and reduce supply current to less than 1A. In shutdown, all circuitry and internal MOSFETs turn off, and the LX node becomes high impedance. Drive SHDN to a logic-level high or connect to VCC for normal operation.
Summing Comparator
Three signals are added together at the input of the summing comparator (Figure 2): an output voltage error signal relative to the reference voltage, an integrated output voltage error correction signal, and the sensed PMOS switch current. The integrated error signal is provided by a transconductance amplifier with an external capacitor at COMP. This integrator provides high DC accuracy without the need for a high-gain amplifier. Connecting a capacitor at COMP modifies the overall loop response (see the Integrator Amplifier section).
Synchronous Rectification
In a step-down regulator without synchronous rectification, an external Schottky diode provides a path for current to flow when the inductor is discharging. Replacing the Schottky diode with a low-resistance NMOS synchronous switch reduces conduction losses and improves efficiency.
8
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2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package MAX1843
MAXIMUM RECOMMENDED OPERATING FREQUENCY vs. INPUT VOLTAGE
VOUT = +1.5V 1200 FREQUENCY (kHz) 1000 800 600 400 200 0 2.6 3.1 3.6 4.1 VIN (V) 4.6 5.1 5.6 VOUT = +1.8V VOUT = +2.5V FB VOUT = +3.3V R2 = R1(VOUT / VREF - 1) VREF = 1.1V R1
MAX1843 fig03
1400
LX
VOUT
MAX1843
R2
Figure 3. Maximum Recommended Operating Frequency vs. Input Voltage
Figure 4. Adjustable Output Voltage
Table 1. Recommended Component Values (IOUT = 2.7A)
VIN (V) 5 5 5 5 3.3 3.3 3.3 VOUT (V) 3.3 2.5 1.8 1.5 2.5 1.8 1.5 fPWM (kHz) 800 1180 850 715 570 985 940 L (H) 2.2 2.2 2.2 2.2 1.5 1.5 1.5 RTOFF (k) 39 47 75 100 39 43 56
Table 2. Output Voltage Programming
PIN FBSEL VCC Unconnected REF GND FB Output voltage Output voltage Output voltage Resistive divider OUTPUT VOLTAGE (V) 2.5 1.5 1.8 Adjustable
Design Procedure
For typical applications, use the recommended component values in Table 1. For other applications, take the following steps: 1) Select the desired PWM-mode switching frequency. See Figure 3 for maximum operating frequency. 2) Select the constant off-time as a function of input voltage, output voltage, and switching frequency. 3) Select RTOFF as a function of off-time. 4) Select the inductor as a function of output voltage, off-time, and peak-to-peak inductor current.
Setting the Output Voltage
The output of the MAX1843 is selectable between one of three preset output voltages: +2.5V, +1.8V, and +1.5V. For a preset output voltage, connect FB to the output voltage, and connect FBSEL as indicated in Table 2. For an adjustable output voltage, connect FBSEL to GND, and connect FB to a resistive divider between the output voltage and ground (Figure 4). Regulation is maintained for adjustable output voltages when VFB = VREF. Use a resistor in the 10k to 50k range for R1. R2 is given by the equation: V R2 = R1 OUT VREF where VREF is typically 1.1V.
-
1
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9
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package MAX1843
Programming the Switching Frequency and Off-Time
The MAX1843 features a programmable PWM mode switching frequency, which is set by the input and output voltage and the value of RTOFF, connected from TOFF to GND. RTOFF sets the PMOS power switch offtime in PWM mode. Use the following equation to select the off-time according to the desired switching frequency in PWM mode: t OFF = The peak inductor current at full load is 1.125 x IOUT if the above equation is used; otherwise, the peak current is calculated by: I PEAK = IOUT + VOUT x t OFF 2x L
(VIN - VOUT - VPMOS ) fPWM (VIN - VPMOS + VNMOS )
Choose an inductor with a saturation current at least as high as the peak inductor current. The inductor you select should exhibit low losses at your chosen operating frequency.
Capacitor Selection
The input filter capacitor reduces peak currents and noise at the voltage source. Use a low-ESR and lowESL capacitor located no further than 5mm from IN. Select the input capacitor according to the RMS input ripple-current requirements and voltage rating: I RIPPLE = I LOAD VOUT (VIN VIN
-
where: tOFF = the programmed off-time VIN = the input voltage VOUT = the output voltage VPMOS = the voltage drop across the internal PMOS power switch VNMOS = the voltage drop across the internal NMOS synchronous-rectifier switch f PWM = switching frequency in PWM mode Select RTOFF according to the formula: RTOFF = (tOFF - 0.07s) (110k / 1.00s) Recommended values for RTOFF range from 36k to 430k for off-times of 0.4s to 4s.
VOUT )
where IRIPPLE = input RMS current ripple. The output filter capacitor affects the output voltage ripple, output load-transient response, and feedback loop stability. For stable operation, the MAX1843 requires a minimum output ripple voltage of VRIPPLE 1% x VOUT. The minimum ESR of the output capacitor should be: ESR > 1% x L t OFF
Inductor Selection
The key inductor parameters must be specified: inductor value (L) and peak current (IPEAK). The following equation includes a constant, denoted as LIR, which is the ratio of peak-to-peak inductor AC current (ripple current) to maximum DC load current. A higher value of LIR allows smaller inductance but results in higher losses and ripple. A good compromise between size and losses is found at approximately a 25% ripple-current to load-current ratio (LIR = 0.25), which corresponds to a peak inductor current 1.125 times the DC load current: L= VOUT x t OFF IOUT x LIR
Stable operation requires the correct output filter capacitor. When choosing the output capacitor, ensure that: t COUT OFF 79FV / s VOUT
Integrator Amplifier
An internal transconductance amplifier fine tunes the output DC accuracy. A capacitor, CCOMP, from COMP to VCC compensates the transconductance amplifier. For stability, choose CCOMP = 470pF. A large capacitor value maintains a constant average output voltage but slows the loop response to changes in output voltage. A small capacitor value speeds up the loop response to changes in output voltage but decreases stability. Choose the capacitor values that result in optimal performance.
where: IOUT = maximum DC load current LIR = ratio of peak-to-peak AC inductor current to DC load current, typically 0.25
10
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2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package
Soft-Start
Soft-start allows a gradual increase of the internal current limit to reduce input surge currents at startup and at exit from shutdown. A timing capacitor, CSS, placed from SS to GND sets the rate at which the internal current limit is changed. Upon power-up, when the device comes out of undervoltage lockout (2.6V typ) or after the SHDN pin is pulled high, a 4A constant-current source charges the soft-start capacitor and the voltage on SS increases. When the voltage on SS is less than approximately 0.7V, the current limit is set to zero. As the voltage increases from 0.7V to approximately 1.8V, the current limit is adjusted from 0 to the current-limit threshold (see the Electrical Characteristics). The voltage across the soft-start capacitor changes with time according to the equation: VSS = 4A x t CSS
SHDN 0 1.8V VSS (V) 0 ILIMIT ILIMIT (A) 0 t 0.7V
MAX1843
Figure 5. Soft-Start Current-Limit Over Time
Circuit Layout and Grounding
Good layout is necessary to achieve the MAX1843's intended output power level, high efficiency, and low noise. Good layout includes the use of ground planes, careful component placement, and correct routing of traces using appropriate trace widths. The following points are in order of decreasing importance: 1) Minimize switched-current and high-current ground loops. Connect the input capacitor's ground, the output capacitor's ground, and PGND. Connect the resulting island to GND at only one point. 2) Connect the input filter capacitor less than 5mm away from IN. The connecting copper trace carries large currents and must be at least 1mm wide, preferably 2.5mm. 3) Place the LX node components as close together and as near to the device as possible. This reduces resistive and switching losses as well as noise. 4) Ground planes are essential for optimum performance. In most applications, the circuit is located on a multilayer board and full use of the four or more layers is recommended. For heat dissipation, connect the exposed backside pad to a large analog ground plane, preferably on a surface of the board that receives good airflow. If the ground plane is located on the IC surface, make use of the N.C. pins adjacent to GND to lower thermal resistance to the ground plane. If the ground is located elsewhere, use several vias to lower thermal resistance. Typical applications use multiple ground planes to minimize thermal resistance. Avoid large AC currents through the analog ground plane.
The soft-start current limit varies with the voltage on the soft-start pin, SS, according to the equation: V - 0.7V SSILIMIT = SS x ILIMIT 1.1V where ILIMIT is the current threshold from the Electrical Characteristics. The constant-current source stops charging once the voltage across the soft-start capacitor reaches 1.8V (Figure 5).
Frequency Variation with Output Current
The operating frequency of the MAX1843 is determined primarily by t OFF (set by R TOFF), V IN, and V OUT as shown in the following formula: fPWM = (VIN - VOUT - VPMOS) / [tOFF (VIN - VPMOS + VNMOS)] However, as the output current increases, the voltage drop across the NMOS and PMOS switches increases and the voltage across the inductor decreases. This causes the frequency to drop. The change in frequency can be approximated with the following formula: fPWM = -IOUT x RPMOS / (VIN x tOFF) where RPMOS is the resistance of the internal MOSFETs (90m typ).
Chip Information
TRANSISTOR COUNT: 3662
______________________________________________________________________________________ 11
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Synchronous Rectification in QFN Package MAX1843
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) 32L QFN .EPS 12 ______________________________________________________________________________________
2.7A, 1MHz, Low-Voltage, Step-Down Regulator with Internal Synchronous Rectification in QFN Package
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
MAX1843
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13 (c) 2002 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.


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